Solder Joint Integrity Test for Finding Latent Defects in PCBs
A novel method purports to locate defects that escape boundary scan and other tests.
Several test methods have been developed to find solder joint defects in printed circuit board assemblies. Capacitance method and IEEE 1149.1 or boundary scan are often used to find opens between component leads and pads on a board. These methods, however, only find complete opens or complete shorts.
Latent defects – ones that can develop after several years of field use – have not been found by conventional methods.